Preview

Proceedings in Cybernetics

Advanced search

Analysis of the infl uence of solder mask roughness and stencil shape on the formation of voids in solder joints

https://doi.org/10.35266/1999-7604-2024-3-8

Abstract

The analysis of the causes of occurrence and ways of minimizing voids that are formed inside soldered joints is carried out. Voids that form during soldering signifi cantly reduce both the mechanical and electrical strength of the joint. In addition, thermal conductivity signifi cantly decreases, especially in component housings, where the soldered joint also acts as a heatsink.
We propose two alternative approaches leading to a decrease in the formation of voids in soldered joints. The fi rst approach involves changing the roughness of the solder mask, which affects the distribution of fl ux
around the contact pad. Research shows that a higher roughness of the solder mask positively affects the better spreading of the fl ux released during solder refl ow. Here, the fl ux spot is larger and less of it gets into the
solde red joint, which leads to a minimization of the volume and number of voids. The second approach includes applying not one large amount of solder paste, but several small ones, separated by small gaps. Moreover, to maintain the volume of the solder dose, it is proposed to use thicker stencils
to apply solder paste. The presence of gaps between the spots of solder paste contributes to better displacement of gases released during refl ow.

About the Authors

A. V. Turetsky
Voronezh State Technical University, Voronezh
Russian Federation

Candidate of Sciences (Engineering), Docent



A. A. Pirogov
Voronezh State Technical University, Voronezh
Russian Federation

Candidate of Sciences (Engineering), Docent



I. V. Sviridova
Voronezh State Technical University, Voronezh
Russian Federation

Senior Lecturer



M. V. Khoroshailova
Voronezh State Technical University, Voronezh
Russian Federation

Candidate of Sciences (Engineering), Docent



E. V. Syomka
Military Educational and Scientifi c Centre of the Air Force N. E. Zhukovsky and Y. A. Gagarin Air Force Academy the Ministry of Defence of the Russian Federation, Voronezh
Russian Federation

Candidate of Sciences (Physics and Mathematics), Docent



References

1. Steiner F., Wirth V., Hirman M. Relationship of soldering profi le, voids formation and strength of soldered joints // 42nd International Spring Seminar on Electronics Technology (ISSE), Wroclaw, 2019. P. 1–6. https://doi.org/10.1109/ISSE.2019.8810303.

2. Zhu N. Thermal impact of solder voids in the electro nic packaging of power devices // Fifteenth Annual IEEE Semiconductor Thermal Measurement and Management Symposium, San Diego, CA, USA, 1999. P. 22–29. https://doi.org/10.1109/STHERM.1999.762424.

3. Chen L., Paulasto-Krockel M., Frohler U. et al. Thermal impact of randomly distributed solder voids on Rth-JC of MOSFETs // 2nd Electronics System-Integration Technology Conference, 2008. P. 237–244. https://doi.org/10.1109/ESTC.2008.4684356.

4. Zhou Y., Ding D., Han B. et al. Infl uence of refl ow atmosphere on SAC305 solder joints // Inter national Symposium on Advanced Packaging Materials (APM), 2011. P. 122–128.

5. Bušek D., Dušek K., Růžička D. et al. Flux effect on void quantity and size in soldered joints // Microelectronics Reliability, 2016. Vol. 60. P. 135– 140. https://doi.org/10.1016/j.microrel.2016.03.009.

6. Ekere N. N., Lo E. K. New challenges in solder-paste printing // Journal of Electronics Manufacturing, 1991. Vol. 01. P. 29–40. https://doi.org/10.1142/S0960313191000059.

7. He D., Ekere N. N., Currie M. A. The behavior of solder pastes in stencil printing with vibrating squeegee // IEEE Transactions on Components, Packaging, and Manufacturing Technology: Part C, 1998. Vol. 21, no. 4. P. 317–324. https://doi.org/10.1109/TCPMC.1998.7102530.

8. Hong L.-Y., Li Y.-T., Li H.-F. Minimize Bottom Termination Component Voids by Board Assembly Process & Design Optimization // 17th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), Taipei, Taiwan. 2022. P. 1–6. https://doi.org/10.1109/IMPACT56280.2022.9966717.

9. Sweatman K., Nishimura T., Sugimoto K. et al. Controlling Voiding Mechanisms in the Refl ow Soldering Process // Proceedings IPC APEX Expo, 2016. P. 1–11.

10. Otáhal A., Somer J., Szendiuch I. Infl uence of heating direction on BGA solder balls structure // Microelectronics and Packaging Conference (EMPC) & Exhibition, Warsaw. 2017. P. 1–4. https://doi.org/10.23919/ EMPC.2017.8346878.

11. Otáhal A., Somer J., Szendiuch I. Infl uence of heat fl ow direction on solder ball interfacial layer // Journal of Electrical Engineering. 2018. Vol. 69, no. 4. P. 305–310. https://doi.org/10.2478/jee-2018-0043.

12. Wang D., Panton R. L. Effect of Reversing Heat Flux Direction During Refl ow on Void Formation in High-Lead Solder Bumps // Journal of Electronic Packaging. 2005. Vol. 127, no. 4. P. 440–445. https://doi.org/10.1115/1.2070047.

13. Yunus M., Primavera A., Srihari K. et al. Effect of voids on the reliability of BGA/CSP solder joints // Twenty Sixth IEEE/CPMT International Electronics Manufacturing Technology Symposium, Santa Clara, CA, USA, 2000. P. 207–213. https://doi.org/10.1109/IEMT.2000.910730.

14. Nurmi S. T., Sundelin J. J., Ristolainen E. O. et al. The effect of PCB surface fi nish on lead-free solder joints // Soldering & Surface Mount Technology. 2005. Vol. 17, no. 1. P. 13–23. https://doi.org/10.1108/09540910510579203.

15. ГОСТ Р МЭК 61190-1-1-2020. Материалы для электронных модулей. Требования к паяльным флюсам для высококачественных межсоединений в электронных сборках. Ч. 1–1. М., 2020. 16 с. URL: https://www.elec.ru/viewer?url=/files/2021/08/09/GOSTR-MEK-61190-1-1-2020.pdf (дата обращения: 18.09.2024).

16. Veselý P., Bušek D., Krammer O. et al. Analysis of noclean fl ux spatter during the soldering process // Journal of Materials Processing Technology, 2020. Vol. 275. https://doi.org/10.1016/j.jmatprotec.2019.116289.

17. Kozák M., Veselý P. Study of voids inside solder joints based on SAC305 solder paste with different properties // 43rd International Spring Seminar on Electronics Technology (ISSE), 2020. P. 1–5. https: //doi.org/10.1109/ISSE49702.2020.9120951.

18. Hirman M., Steiner F. Optimization of solder paste quantity considering the properties of solder joints // Soldering & Surface Mount Technology. 2017. Vol. 29, no. 1. P. 15–22. https://doi.org/10.1108/SSMT-10-2016-0025.


Review

For citations:


Turetsky A.V., Pirogov A.A., Sviridova I.V., Khoroshailova M.V., Syomka E.V. Analysis of the infl uence of solder mask roughness and stencil shape on the formation of voids in solder joints. Proceedings in Cybernetics. 2024;23(3):70-81. (In Russ.) https://doi.org/10.35266/1999-7604-2024-3-8

Views: 67


Creative Commons License
This work is licensed under a Creative Commons Attribution 4.0 License.


ISSN 1999-7604 (Online)